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The biggest challenge for developers is the lack of clear separation between core and non-core domains, leading to a significant amount of code that isn't reusable or essential. This often results in a focus on non-critical aspects such as requirements, algorithms, user experience, and software engineering methods, which are crucial for product competitiveness. Consequently, the maintenance cost of the codebase ends up being much higher than the initial development investment.
Teams that create outstanding products not only maintain a stable workforce but also enjoy better compensation and a more positive mindset. Their success comes from using effective development strategies and mastering technologies quickly, making them more efficient than traditional programmers. While many companies pay well, it's not always clear why some products succeed while others don’t. The failure to sell your own products can lead to wasted resources and missed opportunities for value creation.
More than a decade ago, the author faced similar challenges, prompting him to focus on developing standardized platform technology for both hardware and software. This initiative led to the creation of AWorks. Ametal, derived from the Aworks-Nano subset, supports cross-platform functionality and defines a standard interface for peripheral devices, enabling "on-demand" services that provide real value to users.
Based on this foundation, ZLG offers a wide range of standard peripheral drivers and protocol components, aiming to build a complete ecosystem. Regardless of the MCU you choose, if it supports AMetal, you can achieve "one-time programming, lifelong use," avoiding the need to reinvent the wheel.
**6.1 E2PROM Memory**
E2PROM (Electrically Erasable Programmable Read-Only Memory) is a type of memory that retains data even after power loss. This section uses the FM24C02 as an example to demonstrate how to use similar non-volatile memory in AMetal.
> > > 6.1.1 Device Introduction
The FM24C02 has a total capacity of 2K bits (256 bytes), with each byte corresponding to a unique memory address ranging from 0x00 to 0xFF. Each page is 8 bytes, and writes cannot cross page boundaries. For example, writing at address 0x08, 0x10, 0x18, etc., requires multiple writes if the data crosses the boundary. The memory structure is detailed in Table 6.1.
Table 6.1 FM24C02 Memory Organization Structure
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The FM24C02 communicates via a standard I2C interface, requiring only two signal lines, SDA and SCL. In the 8PIN SOIC package, the WP pin is used for write protection. When tied high, it blocks all write operations, but typically, it is grounded for normal reading and writing.
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Figure 6.1 FM24C02 Pin Definition
The A2, A1, and A0 pins determine the I2C slave address of the FM24C02, which is 0101 0A2A1A0 as a 7-bit address. If only one FM24C02 is on the I2C bus, A2, A1, and A0 are grounded, resulting in an address of 0x50.
In AMetal, the device address is represented as a 7-bit address without considering the read/write direction bit. The MicroPort-EEPROM module connects to the AM824-Core through the MicroPort interface, as shown in Figure 6.2. The EEPROM used is the 256-byte FM24C02C from Fudan Micro-Semiconductor.
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Figure 6.2 EEPROM Circuit Schematic
> > > 6.1.2 Initialization
AMetal provides driver functions for various I2C interface EEPROMs, including FM24C02, FM24C04, and FM24C08. The following example demonstrates the initialization process for FM24C02. The function prototype (am_ep24cxx.h) is:
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This function retrieves the device instance handle fm24c02_handle, where p_dev is a pointer to an instance of type am_ep24cxx_dev_t and p_devinfo is a pointer to instance information of type am_ep24cxx_devinfo_t.
Instance
An individual FM24C02 can be considered an instance of EP24Cxx. EP24Cxx abstracts an EEPROM chip representing a series or same type. Multiple FM24C02s are multiple instances of EP24Cxx. If only one FM24C02 is connected to the I2C bus, an instance of the am_ep24cxx_dev_t type (am_ep24cxx.h) is defined as follows:
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Where g_at24c02_dev is a user-defined instance whose address is passed as an argument to p_dev. If two FM24C02s are connected to the same I2C bus, three instances need to be defined, as shown below:
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Each instance is initialized, returning a handle for subsequent operations.
Instance Information
The instance information describes specific device details, such as the I2C slave address and model. The type am_ep24cxx_devinfo_t (am_ep24cxx.h) is defined as follows:
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Supported device models have corresponding macros in am_ep24cxx.h. For example, the macro for FM24C02 is AM_EP24CXX_FM24C02, and the instance information is defined as:
[Image: http://i.bosscdn.com/blog/19/32/42/44H-7.jpg]
Where g_24c02_devinfo is user-defined instance information whose address is passed as an argument to p_devinfo.
I2C Handle i2c_handle
Taking I2C 1 as an example, the return value of its instance initialization function am_lpc82x_i2c1_inst_init() is passed as an argument to i2c_handle:
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Example Handle fm24c02_handle
The FM24C02 initialization function am_ep24cxx_init() returns fm24c02_handle, which is passed as an argument to the read and write data functions. Its type am_ep24cxx_handle_t (am_ep24cxx.h) is defined as:
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If the return value is NULL, the initialization fails; otherwise, a valid handle is returned.
Based on modular programming principles, the definitions of the initialization-related instance and instance information are stored in the corresponding configuration file, with the instance initialization function interface extracted through the header file. The source file and header file examples are shown in Program List 6.1 and Program Listing 6.2.
Listing 6.1 Example Initialization Function Sample Program (am_hwconf_ep24cxx.c)
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Listing 6.2 Instance Initialization Function Interface (am_hwconf_ep24cxx.h)
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Subsequent use of the parameterless instance initialization function will retrieve the FM24C02 instance handle:
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Note that i2c_handle distinguishes between I2C 0, I2C 1, I2C 2, I2C 3, and the initialization function return value instance handle distinguishes between multiple devices connected in the same system.
> > > 6.1.3 Read and Write Functions
The function prototypes for reading and writing EP24Cxx series memory are shown in Table 6.2.
Table 6.2 ep24cxx Read and Write Functions (am_ep24cxx.h)
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The return value of each API has the same meaning: AM_OK means success, negative values indicate failure, and the reason for failure can be determined by checking the corresponding macro definition in am_errno.h. Positive values are defined by each API, and unless specified, they do not return a positive value.
Data Input
The function prototype for writing data starting from a specified address is:
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If the return value is AM_OK, the write is successful; otherwise, it fails. Assume that 16 bytes are written consecutively starting from address 0x20, as detailed in Listing 6.3.
Listing 6.3 Write Data Sample Program
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Read Data
The function prototype for reading data starting from a specified address is:
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If the return value is AM_OK, the read is successful; otherwise, it fails. Assume that 16 bytes are read consecutively starting from address 0x20, as detailed in Listing 6.4.
Listing 6.4 Read Data Sample Program
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As shown in Listing 6.5, write 20 bytes of data and read it out, then compare the results.
Listing 6.5 FM24C02 Read and Write Sample Program
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Since the parameter of app_test_ep24cxx() is an instance handle, it depends on the EP24Cxx device, so cross-platform calls cannot be implemented.
> > > 6.1.4 NVRAM Universal Interface Functions
Since E2PROM like FM24C02 is a typical non-volatile memory, reading and writing data using the NVRAM (Non-Volatile RAM) standard interface does not require specific device knowledge. Before using these interfaces, set the AM_CFG_NVRAM_ENABLE macro in the project configuration am_prj_config.h to 1. The related function prototypes are shown in Table 6.3.
Table 6.3 NVRAM Common Interface Functions
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Initialization Function
The NVRAM initialization function is intended to initialize the NVRAM function of the FM24C02 to read and write data using the NVRAM standard interface. Its function prototype is:
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The ep24cxx instance handle fm24c02_handle is passed as an argument to the handle, p_dev is a pointer to the am_nvram_dev_t type instance, and p_dev_name is an NVRAM device name assigned to the FM24C02, allowing other modules to locate the FM24C02 memory by this name.
(1) Example (NVRAM Memory)
NVRAM abstractly represents all non-volatile memory, and the FM24C02 can be considered a specific example of NVRAM memory. Define an example of the am_nvram_dev_t type (am_nvram.h) as follows:
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Where g_24c02_nvram_dev is a user-defined instance whose address is passed as an argument to p_dev.
(2) Instance Information
The instance information contains only the device name specified by the p_dev_name pointer. The device is named a string such as "fm24c02". After initialization, the name uniquely identifies an FM24C02 memory device. If there are multiple FM24C02s, they can be named "fm24c02_0", "fm24c02_1", "fm24c02_2", etc.
Based on the modular programming idea, the code that initializes the FM24C02 to the standard NVRAM device is stored in the corresponding configuration file, and the corresponding instance initialization function interface is extracted through the header file. See Listing 6.6 and Program Listing 6.7 for details.
Listing 6.6 Adds the NVRAM Instance Initialization Function (am_hwconf_ep24cxx.c)
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Listing 6.7 am_hwconf_ep24cxx.h File Update
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Subsequently, you only need to use the parameterless instance initialization function to complete the NVRAM device initialization and initialize the FM24C02 to an NVRAM storage device named "fm24c02".
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Storage Segment Definition
NVRAM defines the concept of a bucket, and both read and write functions operate on specific buckets. NVRAM memory can be divided into single or multiple segments. The type of the storage segment am_nvram_segment_t is defined as (am_nvram.h) as follows:
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The name of the bucket p_name and the unit number unit can uniquely identify a bucket. When the names are the same, the unit number is used to distinguish different buckets. The name of the storage segment gives each storage segment an actual meaning. For example, a storage segment named "ip" represents a storage segment that holds an IP address, and a storage segment named "temp_limit" represents a storage temperature upper limit value. Seg_addr is the starting address of the storage segment in the actual storage, and seg_size is the capacity of the storage segment. P_dev_name indicates the name of the actual storage device corresponding to the bucket.
To assign a bucket to the FM24C02, set p_dev_name in the bucket to "fm24c02". Subsequent read and write operations for this segment are actually reading and writing operations on the FM24C02. For the convenience of management, all storage segments are uniformly defined in the am_nvram_cfg.c file. By default, the storage segment is empty, which is defined as:
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After you have the FM24C02 storage device, you can add some segment definitions. For example, the application needs to use 4 storage segments to store 2 IP addresses (4 bytes × 2), temperature upper limit (4 bytes) and system parameters (50 bytes), the corresponding bucket list (array of bucket information) is defined as follows:
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In order for the bucket to take effect, the am_nvram_inst_init() function (am_nvram_cfg.h) must be called at system startup. The function prototype is:
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This function is often called in the board-level initialization function, which can be clipped by the AM_CFG_NVRAM_ENABLE macro in the project configuration file (am_prj_config.h), as shown in Listing 6.10.
Listing 6.8 Initializing NVRAM in Board Level Initialization
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After NVRAM is initialized, according to the storage segment defined in the am_nvram_cfg.c file, a total of 5 storage segments are added. Their names, unit numbers and sizes are respectively shown in Table 6.4. The general NVRAM read/write interface pair can be used later. These segments are read and written.
Table NVRAM Buckets Defined in Table 6.4
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Data Input
The prototype of the write data function is:
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Among them, p_name and unit respectively represent the name and unit number of the storage segment, determining the storage segment for writing data, p_buf provides data to be written to the storage segment, offset indicates that data is written from the offset specified by the storage segment, and len is the length of the data. If the return value is AM_OK, the write is successful, otherwise it fails. For example, save an IP address to an IP bucket, as described in Listing 6.9.
Listing 6.9 Write Data Sample Program
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Read Data
The prototype of the read data function is:
[Image: http://i.bosscdn.com/blog/19/32/42/4213-33.jpg]
Where p_name and unit are the name and unit number of the storage segment, respectively, to determine the storage segment for reading data; p_buf holds the data read from the storage segment, offset indicates that the data is read from the offset specified by the storage segment, and len is the length of the data. If the return value is AM_OK, the read is successful, otherwise it fails. For example, read the IP address from the IP bucket, as shown in Listing 6.10.
Listing 6.10 Read Data Sample Program
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Now write a simple test program for the NVRAM general interface to test whether the data read and write of a certain segment is normal. Although the test program is a simple application, based on the modular programming idea, it is best to separate the test-related programs. The program implementation and corresponding interface declarations are detailed in Listing 6.11 and Listing 6.12.
Listing 6.11 Test Program Implementation (app_test_nvram.c)
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Listing 6.12 Interface Declaration (app_test_nvram.h)
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The memory segment (segment name and unit number) to be tested is passed to the test program by parameters, and the NVRAM general interface reads and writes data to the test segment. If the result of reading and writing data is completely equal, AM_OK is returned, otherwise AM_ERROR is returned.
It can be seen that the implementation of the application does not contain any device-related statements. It only calls the NVRAM general interface to read and write the specified memory segment. Therefore, the application is cross-platform and can be used in any AMetal platform to further integrate NVRAM. Examples of interfaces and test procedures are detailed in Listing 6.13.
Listing 6.13 NVRAM Universal Interface Read and Write Sample Program
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Obviously, the NVRAM universal interface gives the storage section of the name, making the program superior to the EP24Cxx read-write interface in terms of readability and maintainability. Calling the NVRAM common interface consumes a certain amount of memory and CPU resources, especially in applications where high efficiency or memory shortage is required. The EP24Cxx read/write interface is recommended.
September 05, 2025